Shared bit line cross-point memory array manufacturing method

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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Details

C438S253000, C438S593000, C438S201000, C438S393000, C257S295000, C365S138000

Reexamination Certificate

active

11130981

ABSTRACT:
A shared bit line cross-point memory array structure is provided, along with methods of manufacture. The memory structure comprises a bottom word line with a top word line overlying the bottom word line. A bit line is interposed between the bottom word line and the top word line such that a first cross-point is formed between the bottom word line and the bit line and a second cross-point is formed between the bit line and the top word line. A resistive memory material is provided at each cross-point above and below the bit line. A diode is formed at each cross-point between the resistive memory material and either the top word line or the bottom word line, respectively.

REFERENCES:
patent: 2002/0000597 (2002-01-01), Okazawa

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