Sharable prescaled timer and method for a data processor

Electrical pulse counters – pulse dividers – or shift registers: c – Starting – stopping – presetting or resetting the counter – Counter chains with a radix or base other than the number...

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307271, H03K 2138, H03K 2366

Patent

active

045846987

ABSTRACT:
A data processor having an integral timer including a clock generator producing a specific frequency output comprises a counter chain having an input and output thereof for supplying a fixed frequency divide function. A programmable prescaler couples the clock generator output to the counter chain input for providing a predetermined divisor input to the counter chain. A postscaler operates in consonance with the programmable prescaler coupled to the counter chain output for providing a timer output compensated for the predetermined divisor input. In operation, the timer output has a frequency bearing a constant relationship to the clock generator output frequency independent of the predetermined divisor input of the programmable prescaler.

REFERENCES:
patent: 3036223 (1962-05-01), Phillips
patent: 3263174 (1966-07-01), Bjorkman et al.
patent: 3393366 (1968-07-01), Shoop
patent: 3657658 (1972-04-01), Kubo

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