Modulators – Frequency shift keying modulator or minimum shift keying...
Reexamination Certificate
1998-12-31
2001-10-23
Kinkead, Arnold (Department: 2817)
Modulators
Frequency shift keying modulator or minimum shift keying...
C331S018000, C375S272000, C375S274000, C375S303000, C375S305000, C327S106000, C327S159000
Reexamination Certificate
active
06307441
ABSTRACT:
TECHNICAL FIELD
The present invention relates in general to an integrated circuit for modulating signals and more particularly to an integrated circuit device and related method for spectral shaping of a digital pulse stream by controlling the slew rate of the transition signal that occurs as a result of instantaneous changes between successive pulses.
BACKGROUND OF THE INVENTION
The background is described in connection with an improved modulator useful in cellular telephony applications using a modified Direct Digital Synthesizer (DDS). It should be understood, however, that the principles disclosed may apply to a wide array of applications where component space is limited and a digital implementation of the signal modulation circuitry would help decrease overall component count and/or limit system board space requirements.
Inductors, capacitors and other passive components are essential elements of many electronic devices. Such components are used to perform a variety of functions such as filtering, inter-stage impedance matching, and decoupling of AC and DC signals. For example, in cellular communications such components are used to transmit, receive and filter a modulated analog signal carrier into its audible voice signal counterpart. With the move to smaller and lighter devices, a premium is often placed on the size and number of components in the design.
Modulation is the function which imposes certain characteristics to an electromagnetic signal based on a set of rules and the data to be transmitted. One common modulation technique is known as Frequency Shift Keying (FSK). With FSK modulation, an output signal is switched between two separate frequencies with a higher frequency Nhigh representing a “mark” frequency and a lower frequency Nlow representing as the “space” frequency. Thus, a data train can be reconstructed from an analog signal by modulating the signal in time between “marks” and “spaces.”
The basic FSK modulation scheme
10
is illustrated in
FIG. 1
wherein the digital data stream
12
(
101101
) and its corresponding FSK counterpart
14
are shown. Note that the switching from a “mark” to a “space” occurs almost instantaneously causing a series of abrupt discontinuities
16
in the data stream
12
. The discontinuities
16
in the data stream
12
consume a frequency spectrum of a theoretical infinite range since the rate of change of the signal
12
over time approaches infinity. This rate of change is often referred to as the slew rate and expressed as the mathematical equivalent dv/dt.
SUMMARY OF THE INVENTION
The large frequency spectrum inherent to modulation schemes such as FSK
10
dictates the use of components capable of accommodating instantaneous signal changes. In high frequency application, precise switching is a critical performance characteristic. Often, numerous precision components such as external filters, inductors and capacitors are used to provide enough bandwidth for the modulation spectrum and to limit interference with bands adjacent to modulated signal. The use of such components, however, increase total component count as well as the size of the device circuit board.
A more gradual change of the date stream
12
would relax the requirements of the external components or in some applications eliminate the need for filtering components all together. The resulting waveform would approximate the signal designated B as shown in
FIG. 1
b
. Thus, a device and method for smoothing out the transition between “marks” and “spaces” in a controlled manner would require less spectrum and reduce the number of external components used in the modulation system.
Accordingly, the present invention provides a digital method and integrated circuit for generating a modulated signal with decreased frequency spectrum requirements that limits the number of external components in the system.
In accordance with one embodiment of the invention, a device known as a Direct Digital Synthesizer (DDS) is modified to provide a shaped FSK modulation signal which controls a shape modulation transmit loop. The DDS is generally comprised of counters, memories, digital-to-analog convertors and other standard components which are used to synthesize the signal waveform. The frequency of the signal is set by an accumulator which is incremented through a sequence using specified steps at a fixed clock rate. The larger the step size the sooner the sequence will be terminated. Higher frequencies are obtained by completing a greater number of sequences within the same period. As such, almost instantaneous lock time is achieved by eliminating external filtering components used with prior art signal modulators since the DDS has virtually no settling time as compared to prior art phase lock loops and bandpass filters.
In one embodiment, a large phase accumulator is used providing virtually infinitely small channel spacing.
In another embodiment, the digital modulator of the present invention forms a variable filter that mimics the functionality of a wide array of data filters (such as Gaussian, Chebyshev, Bessel, Butterworth and others) allowing the spectral shape to be optimized for a large number of data transmission systems.
In still another embodiment, a single chip synthesizer/transmitter/modulator useful as a high speed GSM transmit module is provided.
Disclosed in one embodiment is a shape modulation transmit loop with digital frequency control which permits spectral shaping of a digital pulse stream by controlling the slew rate of the transition signal between successive pulses. The loop is formed when the digital data stream is fed into an up/down counter whose output is coupled to a programmable memory means, such as RAM, EEPROM, flash memory or similar electronic storage means. The output of the programmable memory forms a first input to an adder which drives an accumulator according to specified steps. The word output of the accumulator, in turn, becomes the second input to the accumulator. Values corresponding to the desired waveform are stored in a lookup table which is coupled to a digital-to-analog conversion circuit (DAC). The DAC uses the values in the lookup table to construct a sine wave output signal corresponding to the frequency set by the action of the up/down counter, programmable memory means, adder and accumulator.
The invention can be a method of reducing the slew rate in transition from a first RF frequency to a second RF frequency comprising: generating a digital transition ramp; determining at least one digital value which is a function of instantaneous amplitude of the first frequency; combining the transition ramp and the at least one digital value which is a function of instantaneous amplitude of the first frequency to generate a series of ministeps; and using the ministeps to control an analog to digital converter to generate a controlled transition from the first RF frequency to the second RF frequency.
Other aspects and advantages of the invention including its specific implementations are understood by reference to following detailed description taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4748640 (1988-05-01), Staley et al.
Brady III Wade J.
Kinkead Arnold
Neerings Ronald O.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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