Shallow trench isolation using low dielectric constant...

Details Shallow trench isolation using low dielectric constant... Shallow trench isolation using low dielectric constant...

2007-02-13

2007-02-13

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

C257S510000, C257S513000, C257SE21545

Reexamination Certificate

active

11012012

ABSTRACT:
A shallow trench isolation is disclosed wherein the trench depth is reduced beyond that achieved in prior art processes. The reduced trench depth helps to eliminate the formation of voids during the trench refill process and provides for greater planarity in the final isolation structure. Effective device isolation is achieved with a reduced trench depth by utilizing refilling dielectric materials having low dielectric constant.

REFERENCES:
patent: 4109030 (1978-08-01), Briska et al.
patent: 4502914 (1985-03-01), Trumpp et al.
patent: 4567061 (1986-01-01), Hayashi et al.
patent: 4624046 (1986-11-01), Shideler et al.
patent: 4748134 (1988-05-01), Holland et al.
patent: 4959325 (1990-09-01), Lee et al.
patent: 5087586 (1992-02-01), Chan et al.
patent: 5139967 (1992-08-01), Sandhu et al.
patent: 5159428 (1992-10-01), Rao et al.
patent: 5169491 (1992-12-01), Doan
patent: 5191509 (1993-03-01), Wen
patent: 5260229 (1993-11-01), Hodges et al.
patent: 5294563 (1994-03-01), Rao
patent: 5298451 (1994-03-01), Rao et al.
patent: 5302233 (1994-04-01), Kim et al.
patent: 5338968 (1994-08-01), Hodges et al.
patent: 5356828 (1994-10-01), Swan et al.
patent: 5358892 (1994-10-01), Rolfson
patent: 5358894 (1994-10-01), Fazan et al.
patent: 5366590 (1994-11-01), Kadomura
patent: 5369051 (1994-11-01), Rao et al.
patent: 5372951 (1994-12-01), Anjum et al.
patent: 5429995 (1995-07-01), Nishiyama et al.
patent: 5459096 (1995-10-01), Venkatesan et al.
patent: 5470783 (1995-11-01), Chiu et al.
patent: 5492736 (1996-02-01), Laxman et al.
patent: 5492858 (1996-02-01), Bose et al.
patent: 5530293 (1996-06-01), Cohen et al.
patent: 5567553 (1996-10-01), Hsu et al.
patent: 5571576 (1996-11-01), Qian et al.
patent: 5637528 (1997-06-01), Higashitani et al.
patent: 5661335 (1997-08-01), Anjum et al.
patent: 5672539 (1997-09-01), Thakur et al.
patent: 5712186 (1998-01-01), Thakur et al.
patent: 5846888 (1998-12-01), Chapek et al.
patent: 6072226 (2000-06-01), Thakur et al.
patent: 02077127 (1990-03-01), None
patent: 02077127 (1990-03-01), None
patent: 04074425 (1992-03-01), None
patent: 153717 (1996-06-01), None
Yasushiro Nishioka, Radiation Effects on Fluorinated Field Oxides and Associated Devices, Dec. 6, 1990, IEEE Transactions on Nuclear Science, vol. 37, No. 6, pp. 2026-2032.
Kirk-Othmer. Encyclopedia of Chemical Technology. Second Completely Revised Edition. vol. II. 791-792 (1966).
“Silicon Processing for the VLSI Era.”Isolation Technologies for Integrated Circuits. vol. II. Ch. 2. pp. 12-83.
Lutze, et al. “Field oxide Thinning Poly Buffer LOCOS Isolation with Active Area Spacing to 0.1 βm.”J. Electrochem. Soc.137(6): 1867-1870 (1990).
Wolf, S. “Silicon Processing for the VLSI Era.”Process Technology.1: 216-218 (1996).
Wolf, S. “Silicon Processing for the VLSI Era.”Process Technology.3: 337-344 (1996).

Affiliated with

Also associated with

Rating

Shallow trench isolation using low dielectric constant... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Shallow trench isolation using low dielectric constant..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shallow trench isolation using low dielectric constant... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3845260