Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-08-16
2005-08-16
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S437000, C438S439000, C438S431000
Reexamination Certificate
active
06930018
ABSTRACT:
Disclosed is a shallow trench isolation (STI) structure and methods of manufacturing the same. The methods eliminate the requirement for design size adjustments (DSA) in manufacturing the STI structure. Further disclosed is an STI trench liner and methods for the formation thereof by growing a thin oxide layer on shallow isolation trench surfaces while preventing oxide formation on adjacent nitride surfaces, followed by the deposition of, and oxide growth upon, a polysilicon layer.
REFERENCES:
patent: 5872045 (1999-02-01), Lou et al.
patent: 5989978 (1999-11-01), Peidous
patent: 6358796 (2002-03-01), Lin et al.
Chen Zhihao
Ekbote Shashank S.
Mehrad Freidoon
Trentman Brian
Brady III Wade James
Le Thao P.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tung Yingsheng
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