Shader pixel storage in a graphics memory

Details Shader pixel storage in a graphics memory Shader pixel storage in a graphics memory

2006-01-10

2006-01-10

Tung, Kee M. (Department: 2671)

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

C345S531000, C345S552000, C345S557000, C345S522000

Reexamination Certificate

active

06985151

ABSTRACT:
Circuits, apparatus, and methods that enable a shader to read and write data from and to a memory location during a single pass through a graphics pipeline. Some embodiments of the present invention provide an increase in the number of buffers available to a shader. These buffers may be read/write (input/output) or read only (input) buffers. Another provides pixel store and pixel load commands that may be used as instructions in a shader program or program portion, and may appear at positions other than the end of the shader program or program portion. Other embodiments provide a data path between a shader and a graphics memory, typically through a frame buffer interface. This data path simplifies the timing of the above store (write) and load (read) commands. Various embodiments may incorporate one or more of these features.

REFERENCES:
patent: 5761516 (1998-06-01), Rostoker et al.
patent: 6259460 (2001-07-01), Gossett et al.
patent: 6629188 (2003-09-01), Minkin et al.
patent: 2003/0076320 (2003-04-01), Collodi

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