Static information storage and retrieval – Associative memories – Ferroelectric cell
Patent
1986-07-10
1987-09-15
Moffitt, James W.
Static information storage and retrieval
Associative memories
Ferroelectric cell
365154, G11C 1504
Patent
active
046944257
ABSTRACT:
A content addressable memory including a pair of column lines (54, 56) upon which information to be matched with the contents of said memory is placed. The memory is driven by a clock such that during particular clock phase a ROW line (50) and a MATCH line (52) are precharged and both column lines are discharged. The memory cell is comprised of transistors (M1, M2, M3, M4) connected to each other and to a supply voltage (Vcc) to thereby form a cross-coupled inverter storage device. Transistors (M5, M6) are connected to diode transistor (M7) and between the cross-coupled inverter (M1, M2, M3, M4) and column lines (54, 56) to thereby form and XOR gate on said column lines (54, 56) and diode transistor (M7). The diode transistor is connected between transistors (M5, M6), ROW line (50) and MATCH line (52), such that during CAM matches the diode transistor allows charge to be siphoned from MATCH line ( 52) and during a write to said CAM cell allows charge to build up.
REFERENCES:
patent: 4532606 (1985-07-01), Phelps
IBM Technical Disclosure Bulletin--vol. 17, No. 3, Aug. 1974, pp. 882-883.
IBM Technical Disclosure Bulletin--vol. 17, No. 4, Sep. 1974, pp. 1058-1059.
Intel Corporation
Lamb Owen L.
Moffitt James W.
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