Patent
1994-03-03
1996-06-25
Lane, Jack A.
39542106, 395487, G06F 1212
Patent
active
055308341
ABSTRACT:
A cache memory contains a number of RAMs. The RAMs are addressed by independent hashing functions, so as to access a set of locations, one in each RAM. If the required data item is resident in the addressed set, it is accessed. Otherwise, the least-recently used location in the set is selected for overwriting with data from main memory. The contents of the RAM location that is about to be overwritten are saved, and then used to access the memory again in order to address a further set of locations. If any of this further set of locations is less recently used than the saved contents, the saved contents are loaded back into that location.
REFERENCES:
patent: 3949369 (1976-04-01), Churchill, Jr.
patent: 4511994 (1982-09-01), Webb et al.
Colloff Ian G.
Hilditch Albert S.
International Computers Limited
Lane Jack A.
Stephan Fadi A.
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