Semiconductor device manufacturing: process – Including control responsive to sensed condition – Interconnecting plural devices on semiconductor substrate
Reexamination Certificate
2001-08-20
2002-12-31
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
Interconnecting plural devices on semiconductor substrate
Reexamination Certificate
active
06500680
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to systems and methods for scheduling fabrication facility utilization. More particularly, the present invention relates to systems and methods for efficiently scheduling fabrication facility utilization.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
As microelectronic fabrication integration levels have increased and microelectronic device and patterned microelectronic conductor layer dimensions have decreased, so also has increased the complexity of microelectronic fabrication processing methods and microelectronic fabrication processing facilities which are employed for fabricating microelectronic fabrications. The increased complexity of microelectronic fabrication processing methods and microelectronic fabrication processing facilities which are employed for fabricating microelectronic fabrications derives in-part from: (1) the length (i.e., total number of process steps) of a typical microelectronic fabrication process description; along with (2) the variety of microelectronic fabrication process tools which is typically employed for fabricating a typical microelectronic fabrication; further in conjunction with (3) the variety of individual microelectronic fabrications (i.e., part numbers) which is typically fabricated within a typical microelectronic fabrication processing facility; still further in conjunction with (4) any specific microelectronic fabrication tool routing requirements which may be encountered when fabricating a particular microelectronic fabrication or a particular class of microelectronic fabrications within either a single microelectronic fabrication processing facility or a plurality of microelectronic fabrication processing facilities.
Further contributing to the complexity of microelectronic fabrication processing methods and microelectronic fabrication processing facilities is the generally distributed (i.e., non-linear) nature of microelectronic fabrication processing methods and microelectronic fabrication processing facilities, which further allows for various production priorities and dispatching rules when fabricating multiple microelectronic fabrication part numbers within either individual microelectronic fabrication processing facilities or multiple microelectronic fabrication processing facilities. Such varied production priorities and dispatching rules in-turn often provide difficulties in management of microelectronic fabrication work-in-process (WIP) workload within microelectronic fabrication processing facilities.
In light of the foregoing, it is thus desirable in the art of microelectronic fabrication to provide systems and methods for efficiently managing microelectronic fabrication work-in-process (WIP) workload within microelectronic fabrication facilities.
It is towards the foregoing object that the present invention is directed.
Various systems and methods have been disclosed in the arts of manufacturing and fabrication for managing fabrication workload within fabrication facilities, such as but not limited to microelectronic fabrication work-in-process (WIP) workload within microelectronic fabrication facilities.
Included among the systems and methods, but not limiting among the systems and methods, are methods disclosed within Dangat et al., in U.S. Pat. No. 5,971,585 (a method for optimizing within a fabrication facility, such as but not limited to a microelectronic fabrication facility, fabrication assets with respect to fabrication demands, such as to determine which fabrication demands may be met, and thus manage a workload within the fabrication facility, by employing a best can do (BCD) algorithm for matching the fabrication assets with respect to fabrication demands, where the best can do (BCD) algorithm comprises a forward implode feasible plan solver which may alternatively employ either heuristic decision technology or linear programming decision technology). The teachings of the foregoing reference are incorporated herein fully by reference.
Desirable in the art of microelectronic fabrication are additional systems and methods which may be employed for efficiently managing microelectronic fabrication work-in-process (WIP) workload within microelectronic fabrication facilities.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a system and a method for managing microelectronic fabrication work-in-process (WIP) workload within a microelectronic fabrication facility.
A second object of the present invention is to provide a system and a method in accord with the first object of the present invention, wherein the system and the method are readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a system and a method for managing within a fabrication facility, such as but not limited to a microelectronic fabrication facility, a work-in-process (WIP) workload, such as but not limited to a microelectronic fabrication work-in-process (WIP) workload.
To practice the method of the present invention, there is first provided a fabrication facility comprising a plurality of fabrication tools which performs a corresponding plurality of fabrication functions. There is then defined for the fabrication facility an overall routing sequence for fabricating a work-in-process (WIP) workload within the fabrication facility. There is then defined from the overall routing sequence a series of routing sub-sequences defined by a series of service codes, where a routing sub-sequence and a corresponding service code define a sub-plurality of fabrication tools which performs a corresponding sub-plurality of fabrication functions. Finally, there is then fabricated within the fabrication facility a work-in-process (WIP) workload which is routed while employing at least one service code.
The method of the present invention contemplates a system, and in particular a computer implemented system, which may be employed for practicing the method of the present invention.
The present invention provides a system and a method for managing within a fabrication facility, such as but not limited to a microelectronic fabrication facility, a work-in-process (WIP) workload, such as but not limited to a microelectronic fabrication work-in-process (WIP) workload.
The present invention realizes the foregoing object by employing within a fabrication facility comprising a plurality of fabrication tools which performs a corresponding plurality of fabrication functions an overall routing sequence for fabricating a work-in-process (WIP) workload within the fabrication facility. In addition, within the present invention, there is defined from the overall routing sequence a series of routing sub-sequences defined by a series of service codes. Within the present invention a routing sub-sequence and a corresponding service code define a sub-plurality of fabrication tools which performs a corresponding sub-plurality of fabrication functions with respect to a work-in-process (WIP) workload within the fabrication facility. Finally, a work-in-process (WIP) workload is fabricated within the fabrication facility while employing at least one service code.
The system of the present invention and the method of the present invention are readily commercially implemented. As will be illustrated in greater detail within the context of the Description of the Preferred Embodiment which follows, the present invention employs fabrication assets, fabrication resources and fabrication systems which are either generally employed within the art of microelectronic fabrication or readily adapted to the art of microelectronic fabrication. Since it is thus a specific operational methodology of fabrication assets, fabrication resources and fabrication
Chang Chao-Hsin
Tai Yu-Fong
Tsai Chun-Yi
Niebling John F.
Stevenson André C
Taiwan Semiconductor Manufacturing Company Ltd
Tung & Associates
LandOfFree
Service code system and method for scheduling fabrication... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Service code system and method for scheduling fabrication..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Service code system and method for scheduling fabrication... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2997547