Series-connected two-terminal semiconductor devices and their fa

Details Series-connected two-terminal semiconductor devices and their fa Series-connected two-terminal semiconductor devices and their fa

1980-11-13

1982-07-20

Massie, Jerome W.

Metal working

Method of mechanical manufacture

Assembling or joining

29580, 29590, 29591, 156628, 156629, 156631, 156632, 156633, 156649, 156654, 156657, 156662, 357 56, 357 68, 357 76, H01L 21265, H01L 21283, H01L 21308

Patent

active

043398707

ABSTRACT:
A method of fabricating a series-connected combination of two-terminal semiconductor devices on a common substrate comprising: forming a layer of high quality semiconductor material, 4, on the surface of a temporary substrate, 2 and 3, to provide active areas for the devices, forming first contact pattern conductors, 6, 9, 10, on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer for each of the devices, bonding an insulating support substrate, 12, to the first contact pattern, removing the temporary substrate, forming second contact pattern conductors, 17, 18, 19, on the other surface of the high quality layer to provide a separate second contact to this layer for each of the devices, removing regions, 8, of the high quality layer separating the conductors of a pattern at any stage after beginning formation of the first contact pattern in order to define the device active areas so that parts of the first contact pattern are exposed when both the temporary substrate and the regions of the high quality layer have been removed, and providing interconnections between the exposed parts, 10, of the first contact pattern and parts of the second contact pattern, whereby to connect the devices in series.
Also any series-connected combination of two-terminal semiconductor devices fabricated according to the inventive method.

REFERENCES:
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patent: 3649881 (1972-03-01), Chang et al.
patent: 3721593 (1973-03-01), Hays et al.
patent: 3773566 (1973-11-01), Tsuchimoto
patent: 3902095 (1975-08-01), Bierig et al.
patent: 3903590 (1975-09-01), Yokogawa
patent: 3930912 (1976-01-01), Wisbey
patent: 3959045 (1976-05-01), Antypas
patent: 3979820 (1976-09-01), Anthony et al.
patent: 3986196 (1976-10-01), Decker
patent: 4106052 (1978-08-01), Schierz
patent: 4189342 (1980-02-01), Kock
patent: 4241360 (1980-12-01), Hambor et al.
Blum et al., "Method . . . Circuits", IBM Technical Disclosure Bulletin, vol. 21, No. 9 (2/79), pp. 3814-3817.

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