Coded data generation or conversion – Digital code to digital code converters – Parallel to serial
Reexamination Certificate
2011-01-04
2011-01-04
Jeanglaude, Jean B (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Parallel to serial
C341S100000
Reexamination Certificate
active
07864084
ABSTRACT:
A serializer includes a first stage configured to convert m-bit-wide parallel data into n-bit-wide parallel data, where n is 2x, m≧2x+y, x is an integer of at least 1, and y is an integer of at least 1, where the first stage includes a memory unit configured to store the m-bit-wide parallel in response to a timing signal and a first multiplexer configured to output the n-bit-wide parallel data in response to a frequency-multiplied derivative of the timing signal, and a current mode logic (CML) multiplexer stage configured to convert the n-bit-wide parallel data into serial data on successive transitions of n phase-shifted versions of the frequency-multiplied derivative of the timing signal.
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Jeanglaude Jean B
Seiko Epson Corporation
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