Boots – shoes – and leggings
Patent
1987-06-01
1989-01-03
Malzahn, David H.
Boots, shoes, and leggings
G06F 752
Patent
active
047962194
ABSTRACT:
A pipelined multiplier which serially receives a signed input multiplicand and a signed multiplier to generate a signed serial output product is provided. The multiplier utilizes a technique which simplifies the addition of partial product bits by creating a uniform partial product array. Columns of partial product bits are sequentially added in a pipelined structure. Carry bits which are generated during the column addition of partial product bits are delayed in the pipeline and coupled back to the input of the pipeline at the appropriate time for another addition of column bits as product bits are serially outputted. By minimizing delays in the pipeline, multiplication of signed operands of large bit length may be quickly performed.
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patent: 4432066 (1984-02-01), Benschop
patent: 4507749 (1985-03-01), Ohhashi
Swartzlander, Jr., "The Quasi-Serial Multiplier", IEEE Trans. on Computers, vol. C-22, No. 4, Apr., 1973, pp. 317-321.
McDonald et al., "The Two's Complement Quasi-Serial Multiplier", IEEE Trans. on Computers, Dec. 1975, pp. 1233-1235.
Gnanasekaran, "On a Bit-Serial Input and Bit-Serial Output Multiplier", IEEE Trans. on Computers, vol. C-32, No. 9, Sep. 1983, pp. 878-880.
Fisher John A.
King Robert L.
Malzahn David H.
Motorola Inc.
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