Boots – shoes – and leggings
Patent
1993-02-11
1995-06-20
Bowler, Alyssa H.
Boots, shoes, and leggings
395550, 3642387, 3642392, 364DIG1, 365219, G06F 104
Patent
active
054267846
ABSTRACT:
A shift register 10 receives serial data and outputs parallel data in synchronism with the timing of the serial data received. A shift register group 20, 21 receives bit outputs of the parallel data from the shift register 10. The number of bits of shift registers 20, 21 in the shift register group is set in a certain condition that corresponds to the bit outputs of the parallel data from the shift register 10. A plurality of coincidence circuits 107, 108 are provided, which detects agreement between a preset data starting pattern and the bit arrangement of the data in the shift register group. A selector 306 selects a set of parallel outputs from the shift register group according to the output signal from the coincidence circuits 107, 108. Thus only the shift register 10, performs high-speed operations at the same timing as the received serial data, and the other circuits operate at slower speeds whose timing is several times longer than that of the serial data received, thereby eliminating complex timing and averting difficulty control logic.
REFERENCES:
patent: 4048673 (1977-09-01), Hendrie et al.
patent: 4157458 (1979-06-01), Roche
patent: 4692641 (1987-09-01), Highton
patent: 5223833 (1993-06-01), Akata
Yamanaka, et al., "Novel Structure for High-Speed Multihighway Serial-to-Parallel Converter", IEEE Nov. 1988, pp. 1221-1225.
Kawata Atsumi
Nagai Kenji
Tanaka Hirotoshi
Taniguchi Nobuhiro
Yamada Minoru
Bowler Alyssa H.
Hitachi , Ltd.
Nguyen Dzung C.
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