Coded data generation or conversion – Digital code to digital code converters – Serial to parallel
Reexamination Certificate
2006-05-23
2006-05-23
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Serial to parallel
C345S098000
Reexamination Certificate
active
07049983
ABSTRACT:
In a serial-to-parallel conversion (SPC) circuit for digital data which converts the digital data serially inputted, into parallel digital data, and which outputs the parallel digital data; clock signals at frequencies which are, at the highest, ½ of the frequency of the input digital data are employed for operating the SPC circuit, whereby the SPC circuit is improved in power dissipation, stability and reliability.
REFERENCES:
patent: 3885167 (1975-05-01), Berglund
patent: 4830467 (1989-05-01), Inoue et al.
patent: 4963860 (1990-10-01), Stewart
patent: 5101202 (1992-03-01), Chaisemartin et al.
patent: 5168270 (1992-12-01), Masumori et al.
patent: 5218363 (1993-06-01), LeCroy et al.
patent: 5247190 (1993-09-01), Friend et al.
patent: 5396236 (1995-03-01), Ueda
patent: 5399502 (1995-03-01), Friend et al.
patent: 5557272 (1996-09-01), Riggio, Jr.
patent: 5563597 (1996-10-01), McCartney
patent: 5594569 (1997-01-01), Konuma et al.
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5648277 (1997-07-01), Zhang et al.
patent: 5721545 (1998-02-01), Poplevine
patent: 5726990 (1998-03-01), Shimada et al.
patent: 5774079 (1998-06-01), Zirngibl
patent: 5923962 (1999-07-01), Ohtani et al.
patent: 6018305 (2000-01-01), Kikuchi et al.
patent: 6097323 (2000-08-01), Koga et al.
patent: 6175885 (2001-01-01), Marbot et al.
patent: 6177891 (2001-01-01), Nakamura
patent: 6184808 (2001-02-01), Nakamura
patent: 6262702 (2001-07-01), Murade
patent: 6420988 (2002-07-01), Azami et al.
patent: 6512469 (2003-01-01), Azami et al.
patent: 6531996 (2003-03-01), Murade
patent: 6597349 (2003-07-01), Koyama et al.
patent: 6798394 (2004-09-01), Chimura
patent: 6958716 (2005-10-01), Nakajima et al.
patent: 2005/0231456 (2005-10-01), Nakamura et al.
patent: 0 458 169 (1991-11-01), None
patent: 0 759 664 (1997-02-01), None
patent: 0 843 418 (1998-05-01), None
patent: 0 921 517 (1999-06-01), None
patent: 0 938 074 (1999-08-01), None
patent: 2 729 528 (1996-07-01), None
patent: 07-130652 (1995-05-01), None
patent: 07-135318 (1995-05-01), None
patent: 08-078329 (1996-03-01), None
patent: 10-092576 (1998-04-01), None
patent: 11-167373 (1999-06-01), None
patent: 11-231798 (1999-08-01), None
patent: 329005 (1998-04-01), None
patent: WO 90/13148 (1990-11-01), None
Hermann Schenk et al., “Polymers for Light Emitting Diodes,” EuroDisplay 99 The 19thInternational Display Research Conference Proceedings, Sep. 6-9, 1999, pp. 33-37.
Furue et al., “Characteristics and Driving Scheme of Polymer-Stabilized Monostable FLCD Exhibiting Fast Response Time and High Contrast Ratio with Gray-Scale Capability,” SID 98 Digest, pp. 782-785.
Yoshida et al., “A Full-Color Thresholdless Antiferroelectric LCD Exhibiting Wide Viewing Angle With Fast Response Time,” SID 97 Digest, pp. 841-844.
Inui et al., “Thresholdless Antiferroelectricity in Liquid Crystals and Its Application to Displays,” J. Mater. Chem., 1966, 6(4), pp. 671-673.
Azami et al., “Translation of FPD Intelligence 1999,” pp. 76-79, Oct. 15, 1999, vol. 11.
English Abstract of PCT Patent No. WO 97/32295, Published: Sep. 4, 1997.
Koyama et al., “A 4.0-in. Poly Si TFT-LCD with Integrated 6-bit Digital Data Driver Using CGS Technology”, pp. 29-32, Jul. 1, 1999, AM-LCD '99.
Ohtani et al., “LP-B: Late-News Poster: A 60-in. HDTV Rear-Projector with Continuous-Grain-Silicon Technology”, pp. 467-470, May 1, 1998, SID 98 Digest.
Matsueda et al., “30.1: A 6-bit-Color VGA Low-Temperature Poly-Si TFT-LCD with Integrated Digital Data Drivers”, pp. 879-882, Jan. 1, 1998, SID 98 Digest.
Koyama et al., “30.2: A 4.5-in. Full-Color VGA Poly-Si TFT-LCD with Integrated Drivers”, pp. 883-886, Jan. 1, 1998, SID 98 Digest.
Osame et al., “40.1: A 2.6-in. poly-Si TFT-LCD HDTV Display with Monolithic Integrated 8-bit Digital Data Drivers”, pp. 1059-1062, Jan. 1, 1998, SID 98 Digest.
Azami et al., “4.1: A 2.6-in. DTV TFT-LCD with Area-Reduced Integrated 8-bit Digital Data Drivers Using 400-Mobility CGS Technology”, pp. 6-9, Jan. 1, 1999, SID 99 Digest.
Matsueda et al., “4.2: Low-Temperature Poly-Si TFT-LCD with Integrated 6-bit Digital Data Drivers”, pp. 21-24, Jan. 1, 1996, SID 96 Digest.
Specification, Claims, Drawings and Abstract of U.S. Appl. No. 09/206,297 entitled Signal Dividing Circuit and Semiconductor Device filed Dec. 7, 1998.
Yoshida et al., “A Full-Color Thresholdless Antiferroelectric LCD Exhibiting Wide Viewing Angle With Fast Response Time,” SID 97 Digest, pp. 841-844, no month.
Inui et al., “Thresholdless Antiferroelectricity in Liquid Crystals and Its Application to Displays,” J. Mater. Chem., 1966, 6(4), pp. 671-673, no month.
Azami Munehiro
Nagao Shou
Osame Mitsuaki
Shionoiri Yutaka
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
Williams Howard L.
LandOfFree
Serial-to-parallel conversion circuit, and semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Serial-to-parallel conversion circuit, and semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Serial-to-parallel conversion circuit, and semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3536858