Serial to parallel conversion apparatus with means to adjust the

Coded data generation or conversion – Digital code to digital code converters – Serial to parallel

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341106, H03M 900

Patent

active

060183055

ABSTRACT:
The invention provides a serial to parallel conversion apparatus which can perform desired serial to parallel conversion processing at a high speed while it has a simple and small-scale circuit configuration. The serial to parallel conversion apparatus includes a first divider for dividing a first clock signal into 2 to produce a second clock signal and adjusting the phase of the second signal in accordance with a first phase adjustment signal, a first serial to parallel converter for converting serial data into parallel data of 2 bits in response to the second clock signal, a pair of shift registers for receiving and storing the different bits of the parallel data and successively shifting the stored bits in response to the second clock signal, a second divider for dividing the second clock signal into 4 to produce a third clock signal, a second detector for producing the first phase adjustment signal and the second phase adjustment signal based on the stored data of the shift registers, and a pair of second serial to parallel converters for receiving the different bits of the parallel data and each producing first parallel data of 4 bits in response to the third clock signal.

REFERENCES:
patent: 5561423 (1996-10-01), Morisaki
patent: 5726990 (1998-03-01), Shimada et al.
patent: 5774079 (1998-06-01), Zirngibl
patent: 5808571 (1998-09-01), Kuwata et al.

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