Serial scan diagnostics apparatus and method for a memory device

Details Serial scan diagnostics apparatus and method for a memory device Serial scan diagnostics apparatus and method for a memory device

1990-03-29

1992-10-06

Atkinson, Charles E.

Excavating

371 211, G01R 3128

Patent

active

051538822

ABSTRACT:
A scan diagnostics apparatus and method is useful in connection with the memory integrated circuit. A shift register is provided which can receive data in parallel from the input register and output the data serially. The shift register can receive serial data and output in parallel either to the input buffer or the output buffer. Preferably the shift register can receive in parallel, data from the output buffer and output the data serially.

REFERENCES:
patent: 4167780 (1979-09-01), Hayashi
patent: 4476560 (1984-10-01), Miller et al.
patent: 4553090 (1985-11-01), Hatano et al.
patent: 4581739 (1986-04-01), McMahon, Jr.
patent: 4667325 (1987-05-01), Kitano et al.
patent: 4697267 (1987-09-01), Wakai
patent: 4698754 (1987-10-01), Koshino et al.
patent: 4701920 (1987-10-01), Resnick et al.
patent: 4703257 (1987-10-01), Nishida et al.
patent: 4703484 (1987-10-01), Rolfe et al.
patent: 4710930 (1987-12-01), Hatayama et al.
patent: 4743840 (1988-05-01), Sato et al.
patent: 4752907 (1988-06-01), Si et al.
patent: 4780874 (1988-10-01), Lenoski et al.
patent: 4897838 (1990-01-01), Tateishi

Affiliated with

Also associated with

Rating

Serial scan diagnostics apparatus and method for a memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Serial scan diagnostics apparatus and method for a memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Serial scan diagnostics apparatus and method for a memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1196010