Serial port synchronizer

Details Serial port synchronizer Serial port synchronizer

1985-07-26

1988-04-12

Miller, Stanley D.

Electrical pulse counters, pulse dividers, or shift registers: c

Counting or dividing in incremental steps

Beam type tube

328 72, 328155, 377 47, 377 52, 307269, H03K 117, H03K 1700, H03K 513

Patent

active

047377224

ABSTRACT:
Method and apparatus for rapid, low-jitter acquisition of a clock signal at a serial communication port. In the absence of communication over the port, and during clock acquisition, a free-running clock is generated for local communication. Following clock acquisition by a circuit which performs coarse phase adjustments, a simple logic network generates refined phase adjustment signals which drive a variable, nominal divide-by-32, counter so that the clock generated thereby is smoothly brought into synchronization with the acquired clock in one bit increments. In a typical application, at most 48 bit periods at the port are required to synchronize the clock, with a clock phase jitter of less than 1.1%.

REFERENCES:
patent: 4095186 (1978-06-01), Vesel
patent: 4600845 (1986-07-01), McKenna et al.
patent: 4646004 (1987-02-01), Brandt et al.

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