Serial pipeline DAC with Gamma correction function

Details Serial pipeline DAC with Gamma correction function Serial pipeline DAC with Gamma correction function

1999-09-14

2001-07-03

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S151000, C341S161000, C341S159000, C341S158000, C341S160000, C341S120000

Reexamination Certificate

active

06255978

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to digital-to-analog converting apparatus, and more particularly, to digital-to-analog converting apparatus with gamma correction function, which can be utilized in a data driver of a liquid crystal display (LCD) panel.
2. Description of the Prior Art
In a liquid display crystal (LCD) panel, the data driver is a widely used fundamental element, and is utilized in profusion. Besides, the data driver generates the voltage applied on the LCD cell, and the transparence of a LCD cell is non-linearly proportional to the voltage applied on the LCD cell. So it is necessary for the DAC (Digital to Analog Converter) in a digital data driver to be capable of compensating the non-linear relationship between the voltage applied on the LCD cell and the transparence of the LCD cell. The compensation mentioned above is so called Gamma correction, which enables the control of the LCD cells connected to the output terminal of the data driver. Whereas the traditional DAC with Gamma correction function occupies a great deal of the areas of the LCD panel, so it is important to minimize the area of the traditional DAC with Gamma correction function when trying to reduce the volume of the LCD panel.
In general, the relationship between the voltage applied on the LCD cell and the transparence (T) of the LCD cell can be expressed as the curve
10
shown in FIG.
1
A. It is noted that the curve
10
is not a straight line, so the relationship between the output voltage and the input code of the data driver is designed to be a curve. The curve mentioned above can be expressed as the curve
11
(FIG.
1
B), which stands for the relationship between the output voltage and the input code of the data driver. Because the design of the reference voltage levels, the transfer curve of the of the output voltage of the data driver versus the transparence (T) of the LCD cells coupling to the data driver is a straight line. In other words, the design of the reference voltage level is to enable the mapping relationship between the transparence and the output voltage to be a straight line
12
(FIG.
1
B). Through the design of the reference voltage levels of the DACs, the data driver electrically coupling to the DACs mentioned above has the Gamma correction function.
FIG. 2
illustrates the configuration of the LCD panel
15
coupling with the data driver
18
, which comprising DAC
20
. Each LCD cell in the column of the LCD panel is driven by the voltage generated by the data driver
18
, and the data driver
18
includes DAC
20
. Take the LCD having the resolution of 1024 multiplied by 768 as an example, if each data driver has 384 pins, then each LCD panel
15
needs 10 (1024×3÷384) pieces of packaged data driver
18
. Every digital signal fed to the DAC
20
is converted to an analog signal, and the data driver
18
applied the analog signal on the column (including every LCD cell) of the LCD panel
15
. There are many types of DAC can be utilized in the data driver
18
, such as R-DAC which using ROM decoder, and the 2-divided C-DAC which using capacitor. The configuration of the R-DAC is shown in
FIG. 3A
, in which the external reference voltage levels v
0
-v
8
are fed to the reference voltage generator
25
, and every bits of the input digital signal are fed to the reference voltage input terminal. The ROM decoder
30
includes MOS switches (not shown) which connecting the column and row lines. Thus the voltage levels generated by the reference voltage generator
25
are coupled to the input terminals in the ROM decoder
30
, and the output of the operational amplifier is an analog voltage. Through the data driver
18
, the analog voltage is applied to the column of the LCD panel
15
(
FIG. 2
) to drive every LCD cell.
In the other respect, when the 2-divided C-DAC is utilized in the data driver, the configuration can be as the same type shown in
FIG. 3B
, which is a 5-bit DAC. The upper 2-bit of the input data are fed to the switching device
35
of the upper 2-bit data processing unit, and the lower 3-bit of the input data are fed to the switching device
36
of the lower 3-bit data processing unit. Thus the input digital signal is converted to an analog signal, and the output voltage of the 2-divided C-DAC is an analog voltage. The external reference voltage levels v
0
-v
7
and v
1
-v
8
are fed to the upper 2-bit data processing unit and the lower 3-bit data processing unit respectively. In order to implement the Gamma correction function within the DAC, the external reference voltage levels (v
0
-v
7
) are divided into several portions to provide the reference levels that are to be fed to the DAC. So the transfer curve of the input digital signal versus the output voltage level, i.e., the transfer curve of the digital-to-analog converter, fits the curve
11
, which can compensate the non-linearity of the transfer curve of the transparence versus the voltage level applied on the LCD cell. The transfer curve of the input digital signal versus the output voltage level is a curve including 8 sections in piece wise linear that fits the curve
11
in FIG.
1
A.
When the R-DAC is utilized in a data driver, the ROM decoder is utilized to decode the input digital signal, thus the corresponding reference voltage of the DAC is acquired, and the corresponding output analog signal is acquired. Because the resistor is utilized in the R-DAC to divide the external reference voltage level to generate the internal reference voltage levels of the DAC, when the gray level of the input digital signal increase, the area of the data driver including the R-DAC will also increase. For example, when the number of the gray level of the input digital signal is 256, the area of the data driver is about 5.3 times larger than that of the data driver using digital input signal having 64 gray levels.
It is noted that when the number of gray levels of the input digital signal is 256, and the input/output transfer curve is divided into 8 linear sections. Thus the R-DAC must use 256 pieces of resistor, 4096 MOS switches, and 256 power lines, so the area of the data driver is very large. Although the 2-divided C-DAC is utilized instead of R-DAC to reduce the area of the data driver, the foregoing 2-divided C-DAC processing input digital signal still need 16 capacitors and 9 power lines. In order to minimize the area of the data driver, further improvement of the design of the DAC is necessary.
SUMMARY OF THE INVENTION
A method and apparatus for converting digital input signal to analog voltage are disclosed herein, the converting apparatus mentioned above includes a pair of reference voltage selecting devices, a pair of controlled selectively coupling devices, and voltage cumulating device.
One of the pair of reference voltage selecting means is used to select a first voltage level from a first set of reference voltage levels to be a first power source. The other of the pair of the reference voltage selecting devices is used to select a second voltage level from a second set of reference voltage levels as a second power source according to the coding of a first portion of the digital input signal. One of the pair of controlled selectively coupling devices couples the first power source responding to voltage level of every bit of the second portion of the digital input signal. The other of the pair of controlled selectively coupling devices couples the first power source responding to voltage level of inverse of each bit of the second portion of the digital input signal. The voltage cumulating device is used to generate the analog voltage by firstly reset, and then alternatively charging and redistributing the output capacitor with the first capacitor and the second capacitor.
The foregoing method utilized to convert a digital signal to an analog voltage includes the following steps. At the begging, generate a starting signal responding to the digital input signal, and generate a first switching signal, a second switching signal, and a third swi

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