Serial output self-test circuit

Details Serial output self-test circuit Serial output self-test circuit

1997-05-08

1999-06-22

Chung, Phung M.

Excavating

371 671, 371 68, G06F 1100

Patent

active

059149655

ABSTRACT:
A self-test circuit for a fibre optic transmitter is provided. The transmitter includes amplification circuitry which amplifies a first serial digital signal and introduces an unknown delay to produce a second serial digital signal. To detect a failure of the amplification circuitry, the first digital signal is passed through a shift register. When the shift register contains all ones or all zeros, a comparison of the shift register bit type (one or zero) is made with a most recent bit in the second digital signal. If a mismatch is detected, then an error signal is generated.

REFERENCES:
patent: 4178582 (1979-12-01), Richman
patent: 4558447 (1985-12-01), Freeman et al.
patent: 4914379 (1990-04-01), Maeno
patent: 5003539 (1991-03-01), Takemoto et al.
patent: 5471502 (1995-11-01), Ishizeti

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