Boots – shoes – and leggings
Patent
1984-04-10
1987-07-28
Williams, Jr., Archie E.
Boots, shoes, and leggings
G06F 1342
Patent
active
046835300
ABSTRACT:
An interconnecting transparent serial bus for extending a parallel CPU domain to a parallel peripheral module domain includes a bidirectional serial protocol for transferring information between the CPU and one or more peripheral module controllers, referred to as rack masters. Each rack master provides a parallel path to any number of peripheral modules associated therewith. Serial bus protocol includes a frame line, defining a synchronous information exchange interval; a clock line, for propagating a synchronous information clock signal during the information exchange interval; a sync line, for propagating a sync signal to identify one or more discrete asynchronous information fields during the information exchange interval; and a signal line for propagating data, address, and control information between the CPU and its associated rack masters in serial fashion.
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Munteanu Florin
Telemecanique Electrique
Williams Jr. Archie E.
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