Serial EEPROM device and associated method for reducing data loa

Details Serial EEPROM device and associated method for reducing data loa Serial EEPROM device and associated method for reducing data loa

1993-04-01

1996-01-30

Gossage, Glenn

Static information storage and retrieval

Magnetic bubbles

Guide structure

395445, 395453, 3652385, G06F 1328, G06F 1336, G11C 1604

Patent

active

054887119

ABSTRACT:
A serial EEPROM (electrically erasable programmable read only memory) device and method for reducing the time required to load data into the serial EEPROM device using a special write cache are disclosed. The EEPROM has an internal memory array for receiving a burst of data sent by a microcontroller. Data in the burst of data is initially loaded into an SRAM (static random access memory) write cache where it is stored sequentially and grouped in a plurality of pages, so that the bus and the microcontroller are freed to allow the microcontroller to perform other processing tasks at least until the EEPROM memory is written and the EEPROM is again accessible to the microcontroller. Writing of the internal memory array is accomplished sequentially with data from the pages of the cache loaded into rows of the internal memory array until the cache is depleted, the pages being sized so that an integral number of pages is stored in each row of the internal memory array.

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patent: 5297148 (1994-03-01), Harari et al.
patent: 5299161 (1994-03-01), Choi
patent: 5327570 (1994-07-01), Foster et al.

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