Serial diagnostic interface bus for multiprocessor systems

Details Serial diagnostic interface bus for multiprocessor systems Serial diagnostic interface bus for multiprocessor systems

1991-07-22

1995-11-21

Kriess, Kevin A.

Boots, shoes, and leggings

364DIG1, 3642293, 364265, 3642652, 364267, 3642674, 364284, 39520011, 39520017, G06F 1300, G06F 1100

Patent

active

054695422

ABSTRACT:
Apparatus and method for use in a multiprocessor system (10) having a plurality of processing nodes (P0-P3) each of which includes a local data processor (22a, 28a). The apparatus includes an interface (42) to a controller (14), the interface including a register (48) for storing a function received from the controller, such as a diagnostic function. The interface further includes circuitry (50) for providing the diagnostic function as a packet to an input terminal of a bit serial communication bus (40). The communication bus is threaded through each of the plurality of processing nodes and has an output terminal that terminates at the interface. Each of the nodes includes a register (54) for receiving the packet and, responsive to information conveyed thereby, for halting the local data processor and for controlling the operation of local data processor control signal lines, data signal lines, and address signal lines so as to execute the diagnostic function, such as reading data from or writing data to a specified location. The local data processor may also be reset, rebooted, restarted from a halted condition, or interrupted.

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