Serial data transmission including idle bits

Details Serial data transmission including idle bits Serial data transmission including idle bits

1990-09-14

1993-09-21

LaRoche, Eugene R.

395200, 395800, G06F 1516, G06F 1110

Patent

active

052476570

ABSTRACT:
A serial data interface communicates data between a control processor (1) and one or more slave processors (2) via a serial bus (3). Typically the control processor (1) may be formed in a hand held or lap top computer and the slave processor (2) in a peripheral device for the computer. The control processor (1) transmits a clock signal over a clock line in the serial bus (3) to the slave processor (2). At the same time, control or data frames are transmitted from the control processor (1) the slave processor (2) or data frames are transmitted from the slave processor (3) to the control processor (1). Each data frame has a control portion which identifies the frame as a control frame or as a data frame, and following the control portion a plurality of data bits bounded by idle bits. Both the slave processor (2) and the control processor (1) free the data line for a change in the direction of data transmission during each idle bit.
In a preferred example, each control frame includes a select bit identifying the control frame as a slave select frame or as a slave control frame. Each slave control frame includes data transmission parameters which set the slave processor (2) to read or write one or more data frames subsequent to the current control frame.

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