Serial data receiver with phase shift detection

Coded data generation or conversion – Digital code to digital code converters – Serial to parallel

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341 63, H03M 900

Patent

active

050033085

ABSTRACT:
An asynchronous serial data receiver for receiving a stream of data bits, characterized by a plurality of shift registers (54) into which samples corresponding to points within said data bit stream are read, different shift registers (54) holding a different set of said samples, said points being separated by most one half of a data bit period, and a decoder (60-90) responsive to said samples held in said shift registers (54) for recognizing points of known phase within said data assessed relative to which samples which corresponding to points within said data bits may be identified for reading. The invention provides a high speed serial receiver which is particularly suitable for use within disc drives and data storage and retrieval systems in general. The serial data receiver of the present invention does not require a clock synchronized with the incoming data. Furthermore the serial data receiver is able to share the sampling of the data bit stream between a plurality of shift registers (54) none of which need be clock more than once per data bit period.

REFERENCES:
patent: 4216460 (1980-08-01), Baldwin et al.
patent: 4446516 (1984-05-01), Nishimura
patent: 4833471 (1989-05-01), Tokuume et al.
patent: 4901076 (1990-02-01), Askin

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