Serial data mapping apparatus for synchronous digital hierarchy

Details Serial data mapping apparatus for synchronous digital hierarchy Serial data mapping apparatus for synchronous digital hierarchy

2006-04-18

2006-04-18

Ngo, Ricky Q. (Department: 2663)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S466000, C370S535000, C370S536000

Reexamination Certificate

active

07031351

ABSTRACT:
Disclosed is a serial data mapping apparatus and method for mapping DS serial data into VC parallel data which includes an STM-1 address generating unit for generating a mapping address; a VC mapping unit for mapping a DS asynchronous signal into a VC signal as byte unit, according to the mapping address; and an STM-1 formatting unit for pointer processing and multiplexing a virtual container of the mapped VC signal and generating an STM-1 signal.

REFERENCES:
patent: 5933432 (1999-08-01), Ha et al.
patent: 6285673 (2001-09-01), Blackburn et al.
patent: 6584118 (2003-06-01), Russell et al.
patent: 6628651 (2003-09-01), Ryan et al.
patent: 2002/0159473 (2002-10-01), Roberts et al.

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