Serial core memory array

Details Serial core memory array Serial core memory array

1975-03-17

1976-12-21

Moffitt, James W.

Communications: electrical

Digital comparator systems

340174GP, 340174S, 340174SC, G11C 11061

Patent

active

039991733

ABSTRACT:
A densely packed low weight, low volume, minimum temperature gradient memory array comprising a bilateral printed circuit board having a plurality of ferrite cores arranged in columns and rows mounted on one side and a plurality of integrated circuit diode flatpacks mounted on the other side. A ground plane comprising a thin metallic layer isolates the core plane from the mounting and also serves as a means for maintaining a minimum temperature gradient across the core plane. A heat conductor removes unwanted heat from the array, and the connections to elements of the array are grouped to reduce wiring runs.

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patent: 3229266 (1966-01-01), Rajchman
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patent: 3699546 (1972-10-01), McLean
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patent: 3707705 (1972-12-01), Howell, Jr.
patent: 3825907 (1974-07-01), Sell et al.
IBM Tech. Disc. Bull., "Combined Memory Core Plane and Circuit Module," by Betz, vol. 10, No. 11, 4/68, p. 1657.
Bell Labs. Record, "New Memory Reduces No. 1 ESS Cost and Size," by Chevalier et al., 4/72, p. 121-123.
RCA Review, "Monolithic Ferrite Memories," by Abeyta et al., 3/66, pp. 77-97.

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