Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
1998-03-31
2002-09-03
Chin, Wellington (Department: 2664)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C710S053000
Reexamination Certificate
active
06445700
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a serial communication circuit used in an integrated circuit of a micro-controller and so forth.
2. Description of the Prior Art
In an integrated circuit used in a micro-controller and so forth, a serial communication circuit is used for sending and receiving serial data. In general, a conventional serial communication circuit is configured as described below.
FIG. 2
is a diagram showing the conventional serial communication circuit.
In the figure,
1
a
and
1
b
are serial interface circuits,
2
a
and
2
b
are buffers, and
3
-
0
and
3
-
1
are serial ports (channels). The internal configuration of the serial interface circuits
1
a
and
1
b
and the serial ports
3
-
0
and
3
-
1
are as follows.
FIG. 3
is a diagram showing the internal configuration of the serial communication circuit.
In the figure, a serial communication circuit
1
corresponds to the serial interface circuits
1
a
and
1
b
in FIG.
2
. The serial communication circuit
1
is composed of a send shift register
11
, a receive shift register
12
, a send control circuit
13
, a receive control circuit
14
, and a baud rate generator
15
. A buffer
2
corresponds to the buffers
2
a
and
2
b
in FIG.
2
. The buffer
2
is composed of a send buffer
21
and a receive buffer
22
. A serial port
3
corresponds to the serial ports
3
-
0
and
3
-
1
in FIG.
2
. The serial port
3
has a receive data line RXD, a send data line TXD, a receive clock line RXC, and a send clock line TXC.
The send buffer
21
and the receive buffer
22
are connected to an internal bus such as a micro-controller. The send buffer
21
contains send data temporality, while the receive buffer
22
contains receive data temporarily. The send shift register
11
receives parallel send data from the send buffer
21
and converts it into serial data for transmission to the send data line TXD. The receive shift register
12
receives serial data via the receive data line RXD and converts it into parallel data for transmission to the receive buffer
22
. The send control circuit
13
and the receive control circuit
14
control data transmission and reception based on synchronous clock signals. The baud rate generator
15
generates clock signals used for serial communication.
FIG. 4
is a diagram showing the configuration of conventional serial communication circuit. In the figure, number
100
is a micro-controller which has two serial communication circuits. Numbers
200
and
300
are external ICs to or from which the serial communication circuits send or receive data. Each IC has a pair of serial ports:
200
A-
200
B and
300
A-
300
B. The serial ports
200
A and
300
A are connected to the serial ports
3
-
0
and
3
-
1
on the micro-controller
100
, while the serial ports
200
B and
300
B are connected to external ICs
200
and
300
, respectively. Because the number of input/output signal lines depends on the serial interface circuits
1
a
and
1
b,
“n” is used to represent the number of input/output signal lines in FIG.
4
and FIG.
2
.
The conventional serial communication circuit, which is independent as shown in
FIG. 2
, has the problems described below.
{circle around (1)} When receive data is too large (the amount of one packet is large) to be stored in the receive buffer
22
, the receiver must ask the sender to stop sending data temporarily and move data somewhere else, for example, to a RAM area. Then, when the receiver becomes ready to receive data, the receiver asks the sender to send data which immediately follows the data that has been sent. This takes long and requires a large amount of data processing on the receiver.
{circle around (2)} When send data is too large to be stored in the send buffer
21
at a time, the sender must store a unit of data in the send buffer, send the unit of data and, after that, store the next unit of data in the buffer. This must be repeated until all data is sent, requiring a large amount of data processing on the sender. That is, having to store data in the send buffer each time it is sent interrupts communication and results in a long communication time. p
0
{circle around (3)} Usually, sending the same data to a plurality of receivers requires as many serial communication circuits. In a configuration in which the serial communication circuit is independent as shown in
FIG. 2
, the same data must be prepared for each serial communication circuit.
{circle around (4)} As shown in
FIG. 4
, communication between the external IC
200
and the external IC
300
requires the serial ports intended for this communication (serial ports
200
B and
300
B in the figure). These special ports are needed in addition to those for communication with serial communication circuits such as
3
-
0
and
3
-
1
. Therefore, if there are a plurality of such nodes as external ICs
200
and
300
and serial communication circuit communication is performed among them, serial ports for communication among these nodes are necessary.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a serial communication circuit which sends or receives data speedily even if the amount of send or receive data is large
To achieve this object, the present invention provides a switch which selects a serial interface circuit from a plurality of serial interface circuits, each with a buffer, and connects it to a serial port.
Therefore, to send data which is too large to be stored in one buffer, data is stored in a second buffer while data is being sent from a first buffer and, immediately after all data is sent from the first buffer, the switch is switched to the second buffer to send data from there. This allows a large amount of data to be sent continuously.
To receive data which is too large to be received in one buffer, the switch is switched to a second buffer when a first buffer becomes full. This allows a large amount of data to be received continuously.
REFERENCES:
patent: 4298954 (1981-11-01), Bigelow
patent: 4513412 (1985-04-01), Cox
patent: 5187780 (1993-02-01), Clark et al.
patent: 5469432 (1995-11-01), Gat
patent: 5649217 (1997-07-01), Yamanaka et al.
patent: 5799209 (1998-08-01), Chatter
patent: 6035345 (2000-03-01), Lee
patent: 2 250 307 (1974-04-01), None
patent: 0 018 518 (1980-11-01), None
patent: 2 636 448 (1990-03-01), None
patent: 57003161 (1982-01-01), None
Ohie Mitsuya
Yusa Atsushi
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