Multiplex communications – Channel assignment techniques – Details of circuit or interface for connecting user to the...
Reexamination Certificate
1998-08-28
2003-10-14
Marcelo, Melvin (Department: 2663)
Multiplex communications
Channel assignment techniques
Details of circuit or interface for connecting user to the...
C340S003100, C340S003540
Reexamination Certificate
active
06633581
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a communication apparatus such as a serial communication apparatus or the like which communicates with one or plural communication devices on a communication line.
2. Related Background Art
FIG. 11
shows an structural example of a conventional serial communication system. In this system, a communication controller
101
, a communication IC
102
to which a motor driver
105
for driving a motor
104
is connected, and a communication IC
103
to which plural sensors
106
are connected are cascade-connected through a set of signal lines consisting of a total of four lines, i.e., a +5V line acting as a power supply line, a ground (GND) line, a sync clock (CLK) line for serial communication and a data (DATA) line.
The eight communication IC's can be maximally cascade-connected to one communication controller
101
, and an inherent address (address
0
, address
1
, . . . ) can be designated to each communication IC. In
FIG. 11
, the two communication IC's
102
and
103
are cascade-connected to the controller
101
. On the other hand, eight data registers
0
to
7
are provided inside the controller
101
. These registers
0
to
7
are respectively corresponding to the inherent addresses (addresses
0
to
7
) of the communication IC's, and each register is selected by a serial communication control unit
120
.
Such the communication controller
101
as above communicates, i.e., transmission or reception, with the communication IC corresponding to each of the data registers. At a transmission time, data is transmitted from the controller
101
through a transmission buffer
121
and a shift register
122
. On the other hand, at a reception time, data is received from the communication IC through a shift register
124
and a reception buffer
123
.
FIG. 12
shows a structural example in a case where the above-described serial communication system is used inside an image formation apparatus
1
such as a copy machine or the like.
In
FIG. 12
, a host CPU (not shown) and a communication controller
201
are bus-connected to each other by means of an address bus, a data bus and a control signal bus. Further, the communication controller
201
, a communication IC
202
to which a motor driver
208
for driving a motor
206
positioned at an appropriate location inside the apparatus is connected, a communication IC
203
to which a motor driver
209
for driving a motor
207
, a communication IC
204
to which plural sensors
210
are connected, and a communication IC
205
to which plural sensors
211
are connected are connected through a set of signal lines. Thus, data communication between the communication controller
201
and each of the communication IC's
202
to
205
is performed in response to a transmission instruction or a reception instruction issued from the host CPU.
Irrespective of locations of these communication IC's
202
to
205
in the apparatus, an inherent address (address
0
, address
1
, address
2
, . . . ) is determined for each communication IC. Thus, by designating the address in a communication frame (pulse column), the communication controller
201
performs the transmission/reception to/from the communication IC of which address corresponds to the designated address.
Subsequently, the outline of an operation of the above-described serial communication system will be explained hereinafter. In case of performing a transmission operation for transmitting a predetermined-phase data to drive or rotate the motor
206
, the host CPU stands a transmission flag for performing the transmission in the communication controller
201
and writes transmission data into the data register
0
. When the transmission data is written, the controller
201
sends a predetermined-frequency pulse column to a CLK line.
By using such a system structure, it becomes possible to operate a number of motors and sensors positioned at various locations in the apparatus by using the four cascade-connected signal lines and read the information from the signal lines. In this conventional serial communication system, one address is represented by eight bits, and the information of the eight addresses is managed between the communication controller and the communication IC's. However, according to an agreement of a communication data format, such the structure of the conventional system can be modified to an adequately optimized structure. In addition, by setting plural communication controller functions and thus increasing the number of the signal lines corresponding to the plural functions, the number of the communication IC's can be increased.
Generally, in a case where the number of the communication IC's connected to a set of communication lines is small, if the communication IC's are connected respectively to the separate communication lines, i.e., a multi-system connection state is set, and then the serial communication is performed, processing efficiency may be improved rather than the cascade-connected structure.
For example, for the communication IC connected to a load of which delay is not permitted or a load of which speed is low, it is better to select the address of which communication priority order is as higher as possible. For this reason, in the case where the number of the communication IC's is small, it is better to set the multi-system connection state as numerous as possible and then perform the serial communication.
On the contrary, the communication IC connected to a load of which delay is permitted to some extent is not so affected by the communication priority order. Therefore, in a case where the number of such the communication IC's is large, also in consideration of system assembly or the like, it is more effective to connect all the communication IC's to one set of the communication lines and then perform the serial communication.
However, in the above-described conventional serial communication system, the number of the communication lines can not arbitrarily changed according to the number of the communication IC's, load conditions of the motor, the sensor and the like connected to the communication IC's, and the like. As a result, there has been a problem that the serial communication can not be effectively performed.
For example, as shown in
FIG. 11
, in the case where merely the two communication IC's
102
and
103
are used in one unit although the eight communication IC's can be maximumly cascade-connected to one set of the communication lines, efficiency in the serial communication becomes seriously degraded, it depends on the load conditions, though.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a data transfer system which can effectively perform, according to the number of communication IC's connected to communication lines and load conditions connected to the communication IC's, serial communication by dividing the communication lines into one or plural systems and using the divided-system communication lines.
REFERENCES:
patent: 6014084 (2000-01-01), Tice
patent: 6134604 (2000-10-01), Soya et al.
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Marcelo Melvin
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