Serial bus interface system for data communication using two-wir

Pulse or digital communications – Repeaters – Testing

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370 85, 375106, H04L 708

Patent

active

048478679

ABSTRACT:
A serial data communication system is disclosed. This system includes a plurality of stations which are interconnected by a single clock wire and a single data wire. A master station in the stations includes a transistor push-pull circuit for driving the clock wire to output a clock signal on the clock wire. The clock signal thus has sharp leading and falling edges. The data wire is coupled to wire logic means. A transmitting station transmits each bit of a data signal on the data wire in synchronism with one of leading and falling edges of the associated clock pulse of the clock signal, and a receiving station receives each bit of the data signal in synchronism with the other of leading and falling edges of the associated clock pulse.

REFERENCES:
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patent: 3916108 (1975-10-01), Schwartz
patent: 4184045 (1980-01-01), Philipson
patent: 4225752 (1980-09-01), Looschen
patent: 4301532 (1981-01-01), Janetzky
patent: 4437021 (1984-03-01), Sumi et al.
patent: 4475191 (1984-10-01), James et al.

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