Serial array time-slot interchangers

Details Serial array time-slot interchangers Serial array time-slot interchangers

1989-09-05

1992-05-19

Olms, Duglas W.

Multiplex communications

Wide area network

Packet switching

359140, H04Q 1104

Patent

active

051154285

ABSTRACT:
A series array architecture using multiple photonic stages perform universal permutation of time-slots on a time-multiplexed photonic signal using far fewer switches than the currently known architectures. The array architectures include Serial switch arrays with feed-forward delay, Serial switch arrays with feedback delay using shift-base of 2, and Serial switch arrays with feedback delay using shift-base of 3. The array has multiple stages where each can be described as the temporal equivalent of spatial interconnection networks.

REFERENCES:
patent: 3956593 (1976-05-01), Collins et al.
patent: 4686670 (1987-08-01), Kessels et al.
patent: 4759010 (1988-06-01), Murata et al.
patent: 4922479 (1990-01-01), Su
Thompson et al, "An Experimental Photonic Time Slot Interchanger Using Optical Fibers as Reentrant Delay Line Memories", IEEE, 1987.
Thompson, "Architectures with Improved Signal-to-Noise Ratio in Photonic Systems with Fiber-Loop Delay Lines", IEEE 1988.

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