Serial arithmetic processor

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364748, 364754, 341 50, G06F 700, G06F 1100, G06F 738, G06F 752

Patent

active

048581631

ABSTRACT:
A serial arithmetic processor arranged to perform the complex arithmetic functions of the Adaptive Differential Pulse Coded Modulation (ADPCM) algorithm. The serial arithmetic processor includes a first common circuit which is arranged to take advantage of the realization that a large portion of the LOG, FLOAT, and ANTILOG functions can be implemented in common hardware. The serial arithmetic processor further includes a second common circuit which is arranged to take advantage of the realization that large portions of the MULTIPLICATION and FLOATING POINT MULTIPLICATION functions can be implemented in other common hardware. A controller is provided for controlling logic and other circuitry in the first and second common circuits depending upon the desired function to be performed. In addition, a connection of the output of the first common circuit to the input of the second common circuit is preferably provided so that the result of a FLOAT operation can be directly used as the multiplier in a FLOATING POINT MULTIPLICATION operation.

REFERENCES:
patent: 3930232 (1975-12-01), Wallach et al.
patent: 4700319 (1987-10-01), Steiner

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