Serial access dynamic ram

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

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Details

36518912, 36518904, G11C 1300

Patent

active

050420127

ABSTRACT:
A dynamic random access memory having a serial access data port. A plurality of complimentary bitline pairs are provided for receiving data signals from a plurality of memory cells, and a plurality of latches are connected to respective ones of the bitline pairs for periodically sensing and restoring the data signals in the memory cells. Predetermined ones of the latches are connected together via a plurality of isolation transfer gates which are enabled according to a predetermined timing sequence for unidirectionally shifting the data signals therebetween according to a master-slave action.

REFERENCES:
patent: 3763480 (1973-10-01), Weimer
patent: 3772658 (1973-11-01), Sarlo

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