Serdes auto calibration and load balancing

Pulse or digital communications – Transmitters – Antinoise or distortion

Reexamination Certificate

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Reexamination Certificate

active

07570708

ABSTRACT:
The present invention is used to automatically calibrate a SERDES device by utilizing information provided in the eye diagram of the received signal. In particular, the invention mitigates the components of determininistic jitter, such as ISI and frequency distortion. To achieve this goal, the invention enables the receive side of the SERDES to evaluate the quality of the eye received using a cost function. The invention calculates the cost function associated with the received data and then uses this information to effect an auto calibration of the SERDES device.

REFERENCES:
patent: 7099382 (2006-08-01), Aronson et al.
patent: 2005/0281343 (2005-12-01), Hsu et al.
patent: 2007/0031153 (2007-02-01), Aronson et al.
Pease et al. Prictical Measurement of Timing Jitter Contributed by a Clock-and-Data Recovery Circuit 2005 IEEE, p. 119-126.

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