Sequentially clocked substrate bias generator for dynamic memory

Details Sequentially clocked substrate bias generator for dynamic memory Sequentially clocked substrate bias generator for dynamic memory

1982-09-16

1985-01-15

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365149, 365182, G11C 1300, G11C 1140

Patent

active

044942230

ABSTRACT:
A dynamic read/write memory device constructed in a semiconductor chip of the MOS VLSI type employs an on-chip substrate bias generator which is sequentially clocked by the clocks used in operation of the memory. The impact ionization current associated with each clock operation is thus individually supplied, and when a clock is not used the substrate bias for this clock is not generated.

REFERENCES:
patent: 4419739 (1983-12-01), Blum
patent: 4455628 (1984-01-01), Ozaki et al.

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