Sequential memory

Details Sequential memory Sequential memory

1994-02-07

1997-01-14

Yoo, Do Hyun

Static information storage and retrieval

Addressing

Plural blocks or banks

36518901, 36518905, 365221, 36523008, 365239, G11C 700, G11C 804

Patent

active

055947000

ABSTRACT:
A sequential memory (10) uses interleaved memories (12a-b) with associated output buffers (22a-b) to accomplish high data rates. Data access control circuitry (18) and bank select circuitry (20) control the order in which the memory banks (12a-b) are written to and read from. Output buffer circuits (22a-b) allow a data word to be read instantaneously after it is written to the sequential memory (10).

REFERENCES:
patent: 4864543 (1989-09-01), Ward et al.
patent: 4888741 (1989-12-01), Malinowski
patent: 4922457 (1990-05-01), Mizukami
patent: 4954987 (1990-09-01), Auvinen et al.
patent: 5012408 (1991-04-01), Conroy
patent: 5027326 (1991-06-01), Jones
patent: 5029142 (1991-07-01), Ando
patent: 5036493 (1991-07-01), Nielsen
patent: 5255242 (1993-10-01), Ward et al.
IBM Technical Disclosure Bulletin, vol. 30, No. 12, May 1988, pp. 339-341, "Increasing Data Read Rate From Memories".

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