Sequential access memory that can have circuit area reduced

Static information storage and retrieval – Addressing – Sequential

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365240, 36518905, 36518912, 365220, 365221, 36523008, G11C 800, G11C 700

Patent

active

055351700

ABSTRACT:
y memory blocks are connected in series. A row select signal is output to each memory block from a row address pointer corresponding to a plurality of memory circuits in one memory block. Similarly, a column select signal is output to each memory block from a column address pointer corresponding to a plurality of memory circuits in one memory block. Therefore, the same row and column select signals are applied to each memory block, whereby data is sequentially input/output for every memory block. Thus, the circuit complexity of the row and column address pointers can be reduced.

REFERENCES:
patent: 4961169 (1990-10-01), Matsumura et al.
patent: 5444660 (1995-08-01), Yamanaka et al.
patent: 5448530 (1995-09-01), Masuda et al.

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