Static information storage and retrieval – Addressing – Sequential
Patent
1988-08-30
1990-06-19
Popek, Joseph A.
Static information storage and retrieval
Addressing
Sequential
365221, 36523009, G11C 800
Patent
active
049359029
ABSTRACT:
A sequential access memory to be used as a data delaying device in a digital circuit. The sequential access memory is provided with a storage portion which is capable of storing the data of the (m.times.2+l) words, and a counter which has an (m.times.2+l.times.2) base returns to the (m+1) address after having accessed the addresses to the (m.times.2+l) address sequentially from the No. 1 of the storage portion, and accesses the address of No. 1 again after having accessed the addresses to the (m+l) address sequentially from the (m+1) address so as to repeat the similar counting operation. Therefore, the data of the two systems having a portion composed of the m words and the b portion composed of the l words may be outputted at a predetermined timing by a simplified, inexpensive circuit, which requires no output switching device.
REFERENCES:
patent: 4153951 (1979-05-01), Slenkovich
Popek Joseph A.
Sharp Kabushiki Kaisha
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