Sequence instruction display system

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Details

364147, 364900, G06F 906, G06F 1546

Patent

active

045049009

ABSTRACT:
A sequence instruction display system for use with a programmable sequence controller for displaying a desired sequence instruction and the on-off state of the input or output element corresponding thereto. A buffer memory is provided for storing input and output instructions along with the corresponding on-off states transmitted from a program memory of the sequence controller on an on-line basis with the scan of the program memory in the sequence controller. A numeric key is provided to designate an output instruction. A comparator, on detecting the coincidence of the designated output instruction with an output instruction transmitted from the sequence controller, outputs a signal so as to prevent the buffer memory from further storing the input and output instructions. A data display device displays at a time one of the input and output instructions along with the on-off state stored in the buffer memory.

REFERENCES:
patent: 3686639 (1972-08-01), Fletcher et al.
patent: 3964026 (1976-06-01), Yamauchi et al.
patent: 4025902 (1977-05-01), Nakao et al.
patent: 4058711 (1977-11-01), Ondercin et al.
patent: 4227247 (1980-10-01), Kintner

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