Sequence detector using Viterbi algorithm with reduced...

Pulse or digital communications – Receivers – Interference or noise reduction

Reexamination Certificate

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C375S341000, C714S795000

Reexamination Certificate

active

07443936

ABSTRACT:
A sequence detector (1600-w) operating generally according to the Viterbi algorithm uses state reduction via division into symbol families to reduce the complexity of sequence detection. The sequence detector contains a branch metric generator (1402-w), comparison circuitry (1603-w), and symbol generation circuitry (1604, 1605-w, and1606) for converting digital values of an input signal into a sequence of symbols chosen from an alphabet of predefined symbols allocated into multiple non-overlapping families each formed with a plurality of the predefined symbols. The branch metric generator makes intra-family branch selections, each of which is one of a plurality of branches respectively corresponding to a family's symbols, and generates corresponding branch metrics. The comparison circuitry determines state metrics and generates corresponding comparison results. The symbol generation circuitry utilizes the comparison results and the branch selections, or selection information generated from the branch selections, to generate the sequence of predefined symbols.

REFERENCES:
patent: 5291499 (1994-03-01), Behrens et al.
patent: 5502735 (1996-03-01), Cooper
patent: 5602507 (1997-02-01), Suzuki
patent: 5638065 (1997-06-01), Hassner et al.
patent: 5654667 (1997-08-01), Adachi
patent: 5809079 (1998-09-01), Hayashi
patent: 5841478 (1998-11-01), Hu et al.
patent: 5859861 (1999-01-01), Oh
patent: 5960011 (1999-09-01), Oh
patent: 5982818 (1999-11-01), Krueger et al.
patent: 6035007 (2000-03-01), Khayrallah et al.
patent: 6038269 (2000-03-01), Raghavan
patent: 6041433 (2000-03-01), Kamada
patent: 6047024 (2000-04-01), How
patent: 6215744 (2001-04-01), Mita et al.
patent: 6226332 (2001-05-01), Agazzi et al.
patent: 6252904 (2001-06-01), Agazzi et al.
patent: 6253345 (2001-06-01), Agazzi et al.
patent: 6256352 (2001-07-01), Chang
patent: 6289063 (2001-09-01), Duxbury
patent: 6356586 (2002-03-01), Krishnamoorthy et al.
patent: 6408420 (2002-06-01), Todoroki
patent: 6418172 (2002-07-01), Raghavan et al.
patent: 19626076 (1997-01-01), None
patent: 02-215236 (1990-08-01), None
patent: 06-334692 (1994-12-01), None
patent: 08-116275 (1996-05-01), None
patent: 08-172366 (1996-07-01), None
patent: 09-148944 (1997-06-01), None
patent: WO97/11544 (1997-03-01), None
Hagenauer et al., “A Viterbi Algorithm with Soft-Decision Outputs and its Applications”,Procs. GLOBECOM '89, Nov. 1989, pp. 1680-1686.
Lee et al.,Digital Communications(Kluwer Acad. Pubs.), 1988, pp. 34-42 and 319-345.
Lin et al.,Error Control Coding: Fundamentals and Applications(Prentice-Hall), 1983, pp. 315-349.
Oppenheim et al.,Discrete-time Signal Processing(Prentice-Hall), 1989, pp. 149-191.
Raheli et al., “Per-Survivor Processing: A General Approach to MLSE in Uncertain Environments,”IEEE Trans. Comm., Feb./Mar./Apr. 1995, pp. 354-364.
Sklar,Digital Communications, Fundamentals and Applications(Pearson Education), 1988, pp. 333-337.
Ungerboeck, “Trellis-Coded Modulation with Redundant Signal Sets, Part I: Introduction”,IEEE Communications Mag., Feb. 1987, pp. 5-11.
Ungerboeck “Trellis-Coded Modulation with Redundant Signal Sets, Part II: State of the Art”,IEEE Communications Mag., Feb. 1987, pp. 12-21.
Viterbi, “Error Bounds for Convolutional Codes and an Asymptotically Optimum Decoding Algorithm”;IEEE Trans. Info. Theory, Apr. 1967, pp. 260-269.
“1000BASE-T Physical Layer for Gigabit Ethernet”, IEEE 802.3 document D1.0, Sep. 3, 1997, pp. 1-49.
“Fibre Distributed Data Interface (FDDI)—Token Ring Twisted Pair Physical Layer Medium Dependent (TP-PMD)”, Amer. Nat'l Std. ANSI INCITS 263-1995 (R2000), formerly ANSI X3-263-1995, Sep. 25, 1995, 4 introductory pp. and pp. i-viii and 1-68.
“Physical layer specification for 1000 Mb/s operation on four pairs of Category 5 or better balanced twisted pair cable (1000BASE-T)”, Supplement to Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method & Physical Layer Specifications, IEEE Draft P802.3ab/D4.1, Oct. 5, 1998, cover p. and pp. 40-i, 40-ii, 1.1-1.3, 22-1, 28-1, 32-1, 34-1, 42-1, 28B-1-28B-3, 28C-1, 28D-1, 30B-1, and 40-1-40-126.

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