Sequence controller

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Patent

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Details

364900, 3649269, 3649411, G06F 1546, G06F 900

Patent

active

049087452

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to a sequence controller which performs a sequential control cyclically and which, when an interrupt occurs, can perform an interrupt processing.


BACKGROUND ART

There are two types of programmable sequencer: a process incrementing type in which logic operation is carried out according to the sequence program each time an external signal is entered; and a cyclic type in which logic operation is executed according to the sequence program in synchronism with a timing signal irrespective of the arrival of an input signal. The process incrementing type is used in applications where the number of input and output points is relatively small and therefore such functions as interrupt processings are not required. In the cyclic type the time required for execution of one cycle of the sequence program depends on the length of the sequence program. In recent years, sequence programs exceeding 100 milliseconds are available. With such long sequence programs, each step of the sequence program can only be executed once for every 100 milliseconds. When a signal indicating the occurrence of abnormal condition is entered, however, there may be cases where a processing required by the emergency situation cannot be delayed until the next scanning. To deal with such a situation an interrupt processing function is needed.
As the number of input and output points increases, the number of input signals that require an interrupt processing may reach as many as several tens of signal points. In such cases, however, if identifying the signal source that produced an interrupt takes too much time, the merit of using the interrupt request signal may be offset resulting in a delayed response.
Among the sequence controllers with an interrupt processing function, the Japanese Utility Model Laid-Open No. 198645/1982 and the Japanese Patent Laid-Open No. 145329/1987 may be cited.


DISCLOSURE OF THE INVENTION

This invention has been accomplished with a view to overcoming the above problem and its main object is to provide a sequence controller that can analyze a source of an interrupt request signal in a short period of time.
Another object of this invention is to provide a sequence controller that can specify relatively freely input terminals to which an interrupt request signal can be entered.
The programmable sequence controller of the invention consists of: a program storage means for storing a sequence program; external signal input terminals divided into multiple blocks, at least one of the blocks being subdivided into multiple groups each of which consists of multiple terminals; an arithmetic and logic operation means having a timing signal generating circuit for producing a timing signal, the arithmetic and logic operation means being adapted to perform logic operation on two or more signals including the external signals taken in from the external signal input terminals, according to the sequence program which was read out from the program storage means in synchronism with the timing signal; and an output means for outputting a control signal according to the result of calculation performed by the arithmetic and logic operation means.
The sequence controller with the above configuration is characterized in further consisting of: first signal generating means for outputting a first signal when an interrupt signal occurs in a group of external signal input terminals; second signal generating means for outputting a second signal when one of the blocks outputs the first signal; a second signal transfer means for informing the arithmetic and logic operation means that the second signal has been produced in the block; and an access means by which the arithmetic and logic operation means when informed by the second signal transfer means of the occurrence of the second signal stops the execution of the logic operation requested by the sequence program, accesses the second signal generating means successively and, when it finds the block that produced the second signal, accesses successivel

REFERENCES:
patent: 4564898 (1986-01-01), Yano
patent: 4567556 (1986-01-01), Onogi et al.
patent: 4608661 (1986-08-01), Sasaki
patent: 4683549 (1987-07-01), Takaki

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