Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Determining machine or apparatus operating time or...
Patent
1980-06-02
1983-12-06
Wise, Edward J.
Electrical pulse counters, pulse dividers, or shift registers: c
Applications
Determining machine or apparatus operating time or...
364143, G06F 1546, G06F 305
Patent
active
044197616
DESCRIPTION:
BRIEF SUMMARY
This application is based upon international application #PCT/JP78/00001, filed on Oct. 2, 1978.
FIELD OF THE INVENTION
The present invention relates to a sequence controller, and more particularly to a programmable logic controller (PLC) of a stored program type with which data programming and its modification can be done extremely easily and rapidly.
BACKGROUND ART
Heretofore, various kinds of sequence controllers such as diode matrix systems, quasi-computer systems, or computer systems have been used in the control art. However, for controlling multiple subjects with such a conventional system, a very complicated and expensive sequence control system is required. Moreover, in order to carry out the programming and changing thereof, skilled programmers are required. Therefore, in case there is no person available for such purposes, the programming is often made by an outside party, which will result in the leakage of user's original technical know-how to the outside. The present invention is to provide a sequence control system in which programming of control data and modification of the program can be done easily and rapidly by those who are unskilled in the art.
SUMMARY OF THE INVENTION
Accordingly, it is the object of the present invention to provide a novel and improved sequence control system which enables anybody to easily and rapidly program data for sequence control and to modify the program thus made, and which has a considerably improved performance and may be designed compactly to be held in hand.
In the present invention, data for the sequence control is divided into "1"s (black) data and "0"s (white) data and this data is written in the form of a time chart on a memory sheet. The "1" data is indicated with a black dot and the "0" data is indicated with a white dot. The number of the dot is adapted to correspond to the number of a write-in timing clock pulse generated by the control system. By pushing a black key and a white key on a keyboard the times corresponding to the number of each dot, "1" data, and "0" data are written in a memory of the sequence control system.
The sequence control system according to the present invention provides, for example, outputs for 16 cycles or stages as a standard type. For the convenience of explanation, assume here that the system of the present invention employs a memory of 1024 words.times.1 bit for one cycle, thus 16 memories M1, M2-M16 are used for the total of 16 cycles. It takes only several seconds to write the data for one cycle in the memory. Consequently, writing of data for 16 cycles may be done for only 2 or 3 minutes.
To read out the data stored in the memories, a desirable cycle time is selected, and then a start switch is depressed. The data is read out repeatedly from the memories at the period of the selected cycle time.
The sequence control system according to the present invention is applicable to automation of various kinds of machines and installations such as machine tools, assembling machines, packaging machines, testing and inspecting machines, etc. Because the present invention has a remote I/O (Input/Output) function, a group of machines governed, respectively, by the sequence control system of the present invention can also be controlled by a control system according to the present invention. Thus, the automation of the factory may be achieved at a reduced cost.
An emergency detector is provided separately. If the output is connected to the detection connector of the sequence control system, the output of the system is immediately stopped when any abnormal operation occurs. Further, by coupling the extension connectors of the control system with each other, the number of the cycle of the sequence control can be increased.
The memory employed in the present invention is C-MOS RAM which consumes a very little power and thus can be backed up by batteries. In addition, to cope with any accidental power failure, a power failure detection circuit and flip-flop are provided. Thus, the sequence control system according to the p
REFERENCES:
patent: Re29642 (1978-05-01), Kwiatkowski
patent: 3800253 (1974-03-01), Bryant
patent: 4102492 (1978-07-01), Gold
patent: 4190884 (1980-02-01), Medina
patent: 4196344 (1980-04-01), Kuze
patent: 4225776 (1980-09-01), Meisner
patent: 4250370 (1981-02-01), Sasaki
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