Sequence control method and apparatus

Details Sequence control method and apparatus Sequence control method and apparatus

1984-05-07

1987-07-28

Williams, Jr., Archie E.

Boots, shoes, and leggings

364300, 364191, G06F 900, G06F 1500

Patent

active

046835490

ABSTRACT:
A sequence program for a system to be sequence-controlled is divided into a plurality of divisional programs, which are stored in a program memory of a sequence processor. A main program including a plurality of instruction blocks is read out from the system under control and the execution or non-execution status of the divisional program for the corresponding instruction block is determined and stored in the program memory of the sequence processor. An address table indicating correspondence between the divisional programs and their top addresses is stored in a data memory of a sequence control processor. The sequence processor cyclically executes the main program, and when it determines the need for execution of the divisional program in a certain instruction block, it issues an interrupt signal including identification information for identifying the corresponding divisional program to the control processor. The control processor responds by interrupting the execution of the main program by the sequence processor, looks up the address table to obtain the top address of the corresponding divisional program and causes the sequence processor to execute it, and after the execution thereof, resumes the execution of the main program. By excluding the step execution programs from the main program, the main program sequence cycle time can be shortened. Since no jump destination address information is included in the main program, insertion and deletion of the instruction block to and from the main program are facilitated.

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"IGA/1971 Sixth Annual Meeting of the IEEE Industry and General Applications Group", IEEE Conference Record, Cleveland Sec.

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