Sensor circuit for correlated double signal sampling

Details Sensor circuit for correlated double signal sampling Sensor circuit for correlated double signal sampling

1990-03-19

1991-07-23

Miller, Stanley D.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307443, 307353, 307260, 307263, 307269, 328154, 358445, H03K 1716, H03K 19003

Patent

active

050346334

ABSTRACT:
In a sensor circuit, a sensor device (CTD) is followed by a sampling circuit (CDS) for performing a correlated double signal sampling, having capacitors (C1', C2') and two switches (S1, S2). For simply realizing a rigid coupling between a sensor output signal (PS) and sampling clock pulses (CL, SA), the circuit includes a clock pulse shaper (CST), two inputs (CT1, CT2) of which receive two out of at least three control clock pulse signals (C1, C2, C3) for controlling an output transport in an output shift register (SR).

REFERENCES:
patent: 3969636 (1976-07-01), Baertsch et al.
patent: 4355244 (1982-10-01), Benoit-Gonin et al.
patent: 4633222 (1986-12-01), Dingwall
patent: 4896212 (1990-01-01), Chantelou
patent: 4916530 (1990-04-01), Neilson
"Very High Speed CCD Clock-Pulse Driven Circuit", Research Disclosure, 4/89, 300, Kenneth Mason Publications.

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