Sensing of memory cells in NAND flash

Details Sensing of memory cells in NAND flash Sensing of memory cells in NAND flash

2010-08-20

2011-12-06

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185180, C365S185030

Reexamination Certificate

active

08072812

ABSTRACT:
An analog voltage NAND architecture non-volatile memory data read/verify process and circuits is described that senses analog voltages in non-volatile cells utilizing source follower voltage sensing. In a source follower sensing or read operation the programmed threshold voltage of a cell in a NAND string of a NAND architecture Flash memory array is read by applying an elevated voltage to the source line, an elevated pass voltage (Vpass) is placed on the gates of the unselected cells of the string to place them in a pass through mode of operation, and a read gate voltage (Vg) is applied to the gate of the selected cell. The selected memory cell operates as a source follower to set a voltage on the coupled bit line at the read gate voltage minus the threshold voltage of the cell (Vg−Vt), allowing the voltage of the cell to be directly sensed or sampled.

REFERENCES:
patent: 6819592 (2004-11-01), Noguchi et al.
patent: 7751245 (2010-07-01), Sarin et al.
patent: 2008/0062743 (2008-03-01), Mayer et al.
patent: 2009/0086542 (2009-04-01), Lee et al.

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