Static information storage and retrieval – Floating gate – Particular biasing
Patent
1999-12-16
2000-11-28
Tran, Andrew Q.
Static information storage and retrieval
Floating gate
Particular biasing
3651852, 36518503, 365104, 365168, G11C 1626, G11C 1712
Patent
active
06154390&
ABSTRACT:
A reading circuit for a multibit memory cell in a memory array, the memory cell having a threshold gate voltage within a range of one of a first, second, third and fourth predetermined threshold voltages corresponding respectively to one of four states of two bits stored in the memory cell. The reading circuit includes a circuit to provide a gate voltage to the multibit memory cell during a read cycle, the gate voltage having a first level between the second and third predetermined threshold voltages during a first time interval of the read cycle and a second level between the third and fourth predetermined threshold voltages during a second time interval of the read cycle, sensing circuit coupled to the multibit memory cell which compares current from the multibit memory cell to a first reference current and a second reference current, and produces a first output during the first time interval having a first logic state, if the current from the cell exceeds the first reference current and a second logic state if the current from the cell is less than the first reference current, and produces a second output during the second time interval having a first logic state if the current from the cell is less than the second reference current and greater than the first reference current, and a second logic state if the current from the cell is greater than the first reference current and greater than the second reference current.
REFERENCES:
patent: 5012448 (1991-04-01), Matsuoka et al.
patent: 5021999 (1991-06-01), Kohda et al.
patent: 5457650 (1995-10-01), Sugiura et al.
patent: 5543738 (1996-08-01), Lee et al.
patent: 5619448 (1997-04-01), Lin
patent: 5668752 (1997-09-01), Hashimoto
patent: 5721701 (1998-02-01), Ikebe et al.
patent: 5729490 (1998-03-01), Calligaro et al.
Calligaro et al., "Comparative Analysis of Sensing Schemes for Multilevel Non-Volatile Memories" 1996 Innovative Systems in Silicon Conference, pp. 266-273, May 1997.
Haynes Mark A.
Macronix International Co. Ltd.
Tran Andrew Q.
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