Sense circuit for storage devices such a non-volatile memories,

Details Sense circuit for storage devices such a non-volatile memories, Sense circuit for storage devices such a non-volatile memories,

1991-12-12

1993-12-14

Wambach, Margaret R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307350, 307355, 307491, 307494, 365210, H03F 345, H03K 522

Patent

active

052705900

ABSTRACT:
The sense circuit, for recognizing the virgin or programmed status of cells in storage devices, comprises a differential amplifier having a first input connected to a number of selectable matrix cells, through a first uncoupling circuit, a second input connected to a number of selectable reference virgin cells through a second uncoupling circuit, respective matrix and reference load transistors connected between each input of the amplifier and a supply voltage, and a current generator connected in parallel to the matrix cells and controlled by the first input of the amplifier to draw a current equal to a predetermined fraction of the current flowing through said first input.

REFERENCES:
patent: 4974207 (1990-11-01), Hashimoto
patent: 5091888 (1992-02-01), Akaogi
patent: 5117394 (1992-05-01), Amin et al.
patent: 5148063 (1992-09-01), Hotta
IEEE Journal of Solid-State Circuits, vol. 23, No. 5 published Oct., 1988, regarding article entitled "A 1-MBIT CMOS EPROM With Enchanted Verification".

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