Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2003-01-24
2004-03-30
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185020, C365S185240, C327S051000
Reexamination Certificate
active
06714449
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to non-volatile semiconductor memory devices and, more particularly, to the use of tracking cells for the reading of multi-state memories.
2. Background Information
In a semiconductor memory cell, data is stored by programming the cell to have a desired threshold voltage. The data stored in the cell is read by determining the threshold voltage of the cell and translating this voltage to a logic level. For a two state, binary memory cell, this translation can be done by use of a reference or breakpoint voltage to provide a read point: cells with a threshold voltage above this read point correspond to one state, while those with a threshold voltage below this read point correspond to the other state. When a memory cell is a multi-state cell, a number of such read points need to be introduced to distinguish between the states.
As the number of states stored in a memory cell increases, more states must be contained within a range of threshold values. Consequently, the portion of this range corresponding to a given state become ever narrower and the read points become ever closer. Once the memory cells have been programmed, their threshold values may change from the level to which they were programmed for a number of reasons. This can be due to the less than perfect charge retention in non-volatile memories, where a cell's threshold may go up or down depending on applied bias voltages, fields generated by the stored charge itself, and charge trapped in dielectrics. It can also be due to changes in operating conditions between when the cell is programmed and when it is read. If the read points used to determine the data content of the cells do not follow these changes in the cell, the read points will no longer accurately discriminate between the different threshold voltages. This is the case when a fixed, global set of reference voltages, such as from a band-gap circuit, is used to produce the read points. Such a circuit will not respond, or respond differently, to the conditions which lead the threshold voltages of the memory cells to change. When this change becomes large enough, the read points will no longer accurately discriminate between the threshold voltages found on the cells and the data programmed can no longer be accurately read.
One method to improve the accuracy of the correspondence between the read points and threshold voltage of the cells programmed to a particular data state at the time these cells are read is the use of writable reference or tracking cells. These are a set of memory cells, but which are not written with data and instead are written to predetermined reference values. The read points are then extracted from these cells, which, as they will behave similarly to the data cells, will provide a more accurate correspondence between a data level and the current threshold voltage of a cell originally programmed to that level. The use of reference cells in multi-state memories are described in U.S. Pat. No. 5,172,338 and further developed in U.S. patent application Ser. No. 08/910,947, now U.S. Pat. No. 6,222,762, filed on Aug. 7, 1997, both of which are assigned to SanDisk Corporation and both of which are hereby incorporated herein by this reference.
As the number of states per cell continues to increase, further improvements in the accuracy of the reading process will be needed. Therefore, improvements in tracking cell techniques are needed which not only increase their accuracy and speed of use, but also decrease the amount of overhead they require, both in terms of the actual tracking cells and also in terms of the related circuitry.
SUMMARY OF THE PRESENT INVENTION
The present invention presents several techniques for using writable tracking cells. Multiple tracking cells are provided for each write block of the memory. These cells are re-programmed each time the user cells of the associated write block are written, preferably at the same time, using the same fixed, global reference levels to set the tracking and user cell programmed thresholds. The threshold voltages of the tracking cells are read every time the user cells are read, and these thresholds are used to determine the stored logic levels of the user cells.
In one set of embodiments, populations of one or more tracking cells are associated with different logic levels of a multi-state memory. These tracking cell populations may be provided for only a subset of the logic levels. The read points for translating the threshold voltages are derived for all of the logic levels based upon this subset. In one embodiment, two populations each consisting of multiple tracking cells are associated with two logic levels of the multi-bit cell. Based on the threshold values of this pair of populations, a linear logic level vs. threshold level relation is able to translate the threshold values of the user cells into any of the logic levels. In this way, the logic level of a data cell may be determined based upon a population of tracking cells associated with a non-adjacent logic level. By using more tracking cell populations, more complex relations between the cell threshold values and logic levels can be obtained.
The reading of data cells through use of tracking cells can have digital or analog implementations. In digital implementations, the threshold voltages of the tracking cells are read with a greater resolution than the number of bits stored in the data cells. The controller or other circuitry then converts these higher resolution values to translate the user cell threshold values into the lower logic levels, either by reading cells at the lower resolution level or by translating the user cell values read at the higher resolution into the logic levels. In an analog implementation, the user cells are read directly using the analog threshold values of the tracking cell populations without their first being translated to digital values. An exemplary analog embodiment provides each write sector with a dedicated analog sense amp for each tracking cell, an averaging circuit for each population of tracking cells, and a chain of resistive elements to provide all of the needed read points from the averaged values.
A set of alternate embodiments provide for using different voltages and/or timing for the writing of tracking cells to provide less uncertainty in the tracking cells' final written thresholds. Since there are typically many fewer tracking cells than user storage cells, system write speed is most often limited by the user cells, not the reference cells. Therefore, it may be possible to use different voltages and/or timings which write the reference cells more slowly on average while still writing the slowest reference cell as quickly as the slowest user cell. This can reduce reference cell threshold uncertainty without significantly effecting the overall system write speed.
Additional objects, advantages, and features of the present invention will become apparent from the following description of its preferred embodiments, which description should be taken in conjunction with the accompanying drawings.
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pa
Le Toan
Lebentritt Michael S.
Parsons Hsue & de Runtz LLP
SanDisk Corporation
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