Sense amplifier for amplifying signals on a biased line

Details Sense amplifier for amplifying signals on a biased line Sense amplifier for amplifying signals on a biased line

1986-10-09

1988-09-13

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307448, 307450, 307354, 365205, 365207, G01R 1900, H03K 1716, H03K 19017, G11C 700

Patent

active

047711949

ABSTRACT:
Sense amplifier for use in memory systems, particularly static random access memories (RAM). The sense amplifier circuitry comprises two inverters, one forming a regular amplifier, the other providing a reference voltage (V.sub.Ref) to the amplifier for determining the optimal operating point (A.sub.o) on the inverter's transfer curve, and to a bit line associated with a memory cell being read for biasing the line at its optimal operating level.
The inverters used in the sense amplifier as voltage reference and as amplifier as well as the inverter pairs forming the memory cells may have similar structure and properties and can be formed on the same semiconductor chip.

REFERENCES:
patent: 3714638 (1973-01-01), Dingwall et al.
patent: 4099264 (1978-07-01), Lodi
patent: 4208730 (1980-06-01), Dingwall et al.
patent: 4270190 (1981-05-01), Jindra et al.
patent: 4694201 (1987-09-01), Jason
IBM Tech. Disc. Bul., vol. 28, No. 3, Aug. 1985.
IBM Tech. Dis. Bul., Burke, 9/83.
IEEE GaAs IC Symposium, Oct. 23-25, 1984, "A GaAs 4K Bit Static RAM With Normally-On and -Off Combination Circuit", pp. 117-120 of Technical Digest.
"Estimation of GaAs Static RAM Performance", in IEEE Transactions on Electron Devices, vol. Ed-29, No. 7, Jul. 1982, pp. 1130-1135.

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