Sense amplifier circuit

Details Sense amplifier circuit Sense amplifier circuit

1997-04-15

1998-12-29

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327 57, G11C 706

Patent

active

058545620

ABSTRACT:
A sense amplifier, which is intended to reduce the output response time after it has received a small voltage difference until it delivers amplified output signals, consists of a latch circuit made up of a pair of CMOS inverters, a pair of NMOS transistors connected in parallel to the latch circuit, and a current source connected in series to the latch circuit and NMOS transistor pair. The NMOS transistors amplify a small voltage difference of input signals, and the inverters of the latch circuit further amplify the resulting voltage difference to produce the output signals. Based on is a small voltage difference of input signals being amplified in two stages and the amplifying circuit being of 2-stage serial connection of the current source and the NMOS transistor or CMOS inverter, the delay time of output response can be reduced.

REFERENCES:
patent: 4504748 (1985-03-01), Oritani
patent: 4973864 (1990-11-01), Nogami
patent: 5506524 (1996-04-01), Lin
patent: 5508644 (1996-04-01), Branson et al.
patent: 5526314 (1996-06-01), Kumar
T. Kobayashi et al, "A Current-Mode Latch Sense Amplifier and a Static Power Saving Input Buffer for Low-Power Architecture", 1992 Symposium on VLSI Circuits Digest of Technical Papers, 1992, pp. 28-29.

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