Sense amplifier

Communications: electrical – Digital comparator systems

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Details

327 51, 327 63, 365104, H03F 345

Patent

active

055460682

ABSTRACT:
There is disclosed an integrated circuit including a sense amplifier. The sense amplifier is capable of encoding 2.sup.n levels of output characteristic into a bit pattern of n corresponding bits. The sense amplifier includes a non-zero detect circuit for detecting when the output characteristic is zero. The sense amplifier also includes 2.sup.n -2 comparators for comparing an output characteristic to 2.sup.n -2 reference levels when the output characteristic is non-zero. The 2.sup.n -2 reference levels are constructed from 2.sup.n -2 non-zero levels of the 2.sup.n possible levels of output characteristic. An encoder is coupled to the non-zero detect circuit and the comparators. The encoder encodes the output from the non-zero detect circuit and the outputs from the comparators to corresponding predetermined bit patterns. When the output characteristic is determined to be zero by the non-zero detect circuit, the bit pattern output is a default bit pattern. When the output characteristic is non-zero, the bit pattern takes on predetermined values determined by which pair of reference levels the output falls between, or whether the output characteristic is greater than the largest reference level or less than the smallest reference level.

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Travis N. Blalock, Richard C. Jaeger, A High-Speed Clamped Bit-Line Current-ModeSense Amplifer, IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991.
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